Overview

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Overview

This chapter presents the information how to use this manual and quick start if you are already familiar with Microsoft Visual Studio and C# programming language.

© 2021 JYTEK company. All rights reserved.


Introduction

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Introduction

PCIe/PXIe-5211 series modules are multi-purpose counter data acquisition modules, which can provide 8 channels of counter, supporting edge counting, frequency measurement, period measurement, pulse measurement, two-edge separation measurement, encoder and pulse generation. The device utilizes a high-throughput PCI Express bus and multi-core optimized drivers and application software to provide high-performance capabilities.

Please check with JYTEK website for the latest 5211 series offering.


Main Features

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Main Features

l 8 channels of counter

l 40 channels multi-purpose PFI

l Up to 200MHz internal clock rate

l 1.8 V / 2.5 V / 3.3 V / 5 V level

l Edge Counting / Frequency Measurement / Pulse measurement / Period Measurement / Two-Edge seperation

l Quadrature (x1/x2/x4) encoder

l Two-Pulse encoder

l Dynamic reconfigurable counter output function

l Support multi-card synchronization

l On-board high-performance TCXO clock

l On-board clock generator for sampling


Abbreviations

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Abbreviations

DI: Digital Input

DO: Digital Output

CI: Counter Input

CO: Counter Output

DAQ: Data AcQuisition

PFI: Programmable Function Interface

TXCO: Temperature Compensate X'tal (crystal) Oscillator


Learn by Example

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Learn by Example

JYTEK has added Learn by Example in this manual. We provide many sample programs for this device. Please download and install the sample programs for this device. You can download a JYPEDIA excel file from our web www.jytel,com. Open JYPEDIA and search for JY5211 in the driver sheet, select JY5211.Examples.zip. This will lead you to download the sample program for this device. In addition to the download information, JYPEDIA also has a lot of other valuable information, JYTEK highly recommend you use this file to obtain information from JYTEK.

Figure 1 JYPEDIA Information

In a Learn by Example section, the sample program is in bold style such as Counter Input-->Winform CI Single Edge Counting; the property name in the sample program is also in bold style such as SamplesToAcquire; the technical names used in the manual is in italic style such as SampleRate. You can easily relate the property names in the example program with the manual documentation.

In an Learn by Example section, the experiment is set up as follow. A PCIe/PXIe-5211 card is plugged in a desktop computer. The PCIe/PXIe-5211 is connected to a TB-68/DIN-68S-01 terminal block. A signal source is also connected to the same terminal block.

The TB-68 has 4 terminal columns, J1 – J4. In the rest of this manual, the wire connection in each Learn by Example section will be given by the pin numbers only.

Tip: PCIe/PXIe-5211 also has the counter output capability. If you do not have a signal source, you can use the outputs of PCIe/PXIe-5211 as the signal source. In this case you need first run example program Counter Output--> Winform CO Continuous Wrapping to generate the output.


System Diagram

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System Diagram

Figure 2 PCIe/PXIe-5211 Series System Block Diagram

The system block diagram of PCIe/PXIe-5211 series is shown in Figure 2.

It is mainly composed of one DIO module and eight Counter/Timer modules, providing digital input, digital output, counter input, counter output functions. JYTEK's FPGA-based driver FirmDrive provides a stable and efficient PCIe / PXIe / USB interface.


Digital IO Specifications

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Digital IO Specifications

Table 1 Digital IO Specifications


Counter/Timer Specifications

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Counter/Timer Specifications

Table 2 Counter/Timer Specifications


Front Panel and Pin Definition

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Front Panel and Pin Definition

Figure 3 Front Pannel

Table 3 Pin Defination


Other Specifications

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Other Specifications

Table 4 Other Specifications


Default Routing for Counter Input/Output Signals

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Default Routing for Counter Input/Output Signals

All counter input and output terminals are routed to a certain PFI by default as shown in Table 5.

Table 5 Counter Input/Output Default Routing


System Requirements

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System Requirements

PCIe/PXIe-5211 modules can be used in a Windows or a Linux operating system.

Microsoft Windows: Windows 7 32/64 bit, Windows 10 32/64 bit.

Linux Kernel Versions: There are many Linux versions. It is not possible JYTEK can support and test our devices under all different Linux versions. JYTEK will at the best support the following Linux versions.

Table 6 Supported Linux Versions


System Software

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System Software

When using the PCIe/PXIe-5211 in the Window environment, you need to install the following software from Microsoft website:

Microsoft Visual Studio Version 2015 or above,

.NET Framework version is 4.0 or above.

.NET Framework is coming with Windows 10. For Windows 7, please check .NET Framework version and upgrade to 4.0 or later version.

Given the resources limitation, JYTEK only tested PCIe/PXIe-5211 with .NET Framework 4.0 with Microsoft Visual Studio 2015. JYTEK relies on Microsoft to maintain the compatibility for the newer versions.


C# Programming Language

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C# Programming Language

All JYTEK default programming language is Microsoft C#. This is Microsoft recommended programming language in Microsoft Visual Studio and is particularly suitable for the test and measurement applications. C# is also a cross platform programming language.


PCIe/PXIe-5211 Series Hardware Driver

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PCIe/PXIe-5211 Series Hardware Driver

After installing the required application development environment as described above, you need to install the PCIe/PXIe-5211 hardware driver.

JYTEK hardware driver has two parts: the shared common driver kernel software (FirmDrive) and the specific hardware driver.

Common Driver Kernel Software (FirmDrive): FirmDrive is the JYTEK’s kernel software for all hardware products of JYTEK instruments. You need to install the FirmDrive software before using any other JYTEK hardware products. FirmDrive only needs to be installed once. After that, you can install the specific hardware driver.

Specific Hardware Driver: Each JYTEK hardware has a C# specific hardware driver. This driver provides rich and easy-to-use C# interfaces for users to operate various PCIe/PXIe-5211 function. JYTEK has standardized the ways which JYTEK and other vendor’s DAQ boards are used by providing a consistent user interface, using the methods, properties and enumerations in the object-oriented programming environment. Once you get yourself familiar with how one JYTEK DAQ module works, you should be able to know how to use all other DAQ hardware by using the same methods.


Install the SeeSharpTools from JYTEK

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Install the SeeSharpTools from JYTEK

To efficiently and effectively use PCIe/PXIe-5211 boards, you need to install a set of free C# utilities, SeeSharpTools from JYTEK. The SeeSharpTools offers rich user interface functions you will find convenient in developing your applications. They are also needed to run the examples come with PCIe/PXIe-5211 hardware. Please register and down load the latest SeeSharpTools from our website, www.jytek.com .


Running C# Programs in Linux

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Running C# Programs in Linux

Most C# written programs in Windows can be run by MonoDevelop development system in a Linux environment. You would develop your C# applications in Windows using Microsoft Visual Studio. Once it is done, run this application in the MonoDevelop environment. This is JYTEK recommended way to run your C# programs in a Linux environment.

If you want to use your own Linux development system other than MonoDevelop, you can do it by using our Linux driver. However, JYTEK does not have the capability to support the Linux applications. JYTEK completely relies upon Microsoft to maintain the cross-platform compatibility between Windows and Linux using MonoDevelop.


Operating PCIe/PXIe-5211

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Operating PCIe/PXIe-5211

This chapter provides the operation guides for PCIe/PXIe-5211, including Timer and programmable I/O interface, etc.

JYTEK provides extensive examples, on-line help and documentation to assist you to use the PCIe/PXIe-5211 module. JYTEK strongly recommends you go through these examples before writing your own application. In many cases, an example can also be a good starting point for a user application.


Quick Start

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Quick Start

After you have installed the driver software and the SeeSharpTools, you are ready to use Microsoft Visual Studio C# to operate the PCIe/PXIe-5211 products.

If you are already familiar with Microsoft Visual Studio C#, the quickest way to use PCIe/PXIe-5211 boards is to go through our extensive examples. We provide source code of our examples. In many cases, you can modify the source code and start to write your applications.


Digital I/O Operations

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Digital I/O Operations

The PCIe/PXIe-5211 provides programable I/O function, and contains 40 channels of Programmable Function Interface (PFI).

All 40 PFIs can be used as static digital inputs or outputs. The direction and output state of each PFI can be controlled independently. Users can configure these PFIs by the driver.

In addition, the PCIe/PXIe-5211 also provides an Debounce Filter for each PFI, effectively eliminate the false pulse signal introduced by jitter.

Set JY5211CITask.Device.PFI.Filter.Enable to use this function.

This function enables the filter on Specified Group of Terminals and set the minPulseWidth (ns) of a specified length. Jitter smaller than this length will be ignored. The minPulseWidth is 8 ns in the range of 8 ns to 2040 ns, 128 ns in the range of 2040 ns to 32640 ns, and 2048 ns in the range of 32640 ns to 522240 ns


Counter Measurement Operations

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Counter Measurement Operations

The PCIe/PXIe-5211 has eight identical 32-bit channels of timer/counter as shown in Figure 4.

Figure 4 Counter Input Diagram

Each counter has eight input terminals and one output terminal, and these terminals have different functions in different counter measurement application described below:

l Edge Counting

l Pulse Measurement

l Frequency Measurement

l Period Measurement

l Two-Edge Separation

l Quadrature Encoder (x1, x2, x4)

l Two-Pulse Encoder

For buffered acquisition, each counter has a separate DDR storage space and requires a sample clock. For more information about sample clock, please refer to chapter 4.4.2.


Edge Counting

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Edge Counting

The counter counts the number of active edges of input signal. Default, the input signal must be connected to Counter Source terminal.

Set JY5211CITask.Type to CIType.EdgeCounting to use this function.

Timing

1) Single Mode

The counting value is written to the register on each rising edge or falling edge of the measured signal as shown in Figure 5.

Figure 5 Simple Edge Counting in Single Mode

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Single.

2) Finite/Continuous Mode with Explicit Sample Clock

The counting value is stored into the buffer on each rising edge of the sample clock as shown in Figure 6.

Figure 6 Buffered Edge Counting with Explicit Sample Clock

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Internal or CISampleClockSource.External.

3) Finite/Continuous Mode with Implicit Sample Clock

In implicit mode, the signal active edge as the implicit sample clock edge. The counting value is stored into the buffer on each rising edge of the measured signal as shown in Figure 7.

Figure 7 Simple Edge Counting with Implicit Sample Clock

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Implicit.

Pause Trigger

Pause trigger is used to pause counting when the input signal is active depending on active polarity configuration as shown in Figure 8. Default, the Pause Trigger signal must be connected to Counter Gate terminal.

Figure 8 Pause Trigger

To cofigure the pause trigger, use the properties as below:

l JY5211CITask.EdgeCounting.Pause.ActivePolarity – To set active level (high or low) to pause counting.

Count Direction

User can control the counting direction through software configuration or by an external input signal. Default, the external control direction signal must be connected to Counter Aux terminal.

When using an input signal to control the counting direction, the counter counts up when the signal is high and counts down when the signal is low as shown in Figure 9.

Figure 9 Count Direction

To cofigure the count direction, use the properties as belows:

l JY5211CITask.EdgeCounting.Direction – To specify count up, count down, or controled by an external signal.

Exporting Count Event

When the counting value reaches the specified threshold, the counter will generate a pulse. To change the threshold, using following property:

l JY5211CITask.EdgeCounting.OutEvent.Threshold

Terminals

To change the terminal of signals instead of using its default value as shown in chapter 2.3 , using following properties:

l JY5211CITask.EdgeCounting.InputTerminal – Signal-to-measure input terminal.

l JY5211CITask.EdgeCounting.Pause.Terminal – Pause signal input terminal.

l JY5211CITask.EdgeCounting.DirTerminal – External direction control signal input terminal.

l JY5211CITask.EdgeCounting.OutEvent.Terminal – Count event output terminal.


Learn by Examples 4.2.1

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Edge Counting > Learn by Examples 4.2.1
Learn by Examples 4.2.1

n Connect the signal source’s positive terminal Ch1 of a signal source to PCIe/PXIe-5211 counter0’s edge counting source (CTR0_Source, Pin#65), negative terminal to the ground (GND, Pin#66) as shown in Table 2-15 Pin Defination . (CTR0_Source, GND) consists of an edge counting counter input.

n Set the signal source Ch1’s output to squarewave signal (f=1Hz, [image] =3.3v, [image] =0v).


Single Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Edge Counting > Learn by Examples 4.2.1 > Single Mode
Single Mode

n Open Counter Input-->Winform CI Single EdgeCounter, set the following numbers as shown:

Figure 10 Edge Counting In Single Mode

Ø Count direction is set by Direction.

Ø The table in the sample program is a connection diagram for your convenience.

Ø Click Start, and the result is shown by Count. In this example Count increases by 1 every second for a 1Hz squarewave.


Finite/Continuous Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Edge Counting > Learn by Examples 4.2.1 > Finite/Continuous Mode
Finite/Continuous Mode

n Change the squarewave frequency to 50 Hz.

n Open Counter Input-->Winform CI Finite/Continuous Edge Counting, set the following numbers as shown:

Figure 11 Edge Counting In Finite Mode

Ø The table in the sample program is a connection diagram for your convenience.

Ø Direction is set by Direction.

Ø There are three sample clock sources in PCIe/PXIe-5211 set by Sample Clock Source: Internal, Implicit and External.

n Click Start to start counting by rising edge. The result is shown below:

Figure 12 Edge Counting In Continuous Mode

Ø The numbers are stored in a buffer Counts.

n Change the Sample Clock Source to Implicit:

Figure 13 Edge Counting With Implicit Clock

Ø The numbers are stored in a buffer Counts.

Ø The counter values are different as before because of the change from Sample Clock Source.


Pulse Measurement

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Pulse Measurement

The counter measures the high-level and low-level duration of a pulse on a signal. Default, the input signal must be connected to Counter Gate terminal.

Set JY5211CITask.Type to CIType.Pulse to use this function.

Timing

1) Single Mode

The counting value of the duration of the high-level or low-level is written to the register on each rising or falling edge of the pulse to measure, as shown in Figure 14 .

Figure 14 Pulse Measurement in Single Mode

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Single.

2) Finite/Continuous Mode with Explicit Sample Clock

The counting value of the duration of the high-level or low-level is stored into the buffer on each rising edge of the sample clock, as shown in Figure 15 .

Figure 15 Pulse Measurement with Explicit Sample Clock

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Internal or CISampleClockSource.External.

3) Finite/Continuous Mode with Implicit Sample Clock

In implicit mode, the signal active edge as the implicit sample clock edge. The counting value of the duration of the high-level or low-level is stored into the buffer on each rising edge of the measured pulse, as shown in Figure 16 .

Figure 16 Pulse Measurement with Implicit Sample Clock

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Implicit.

Timebase

By default, the counter uses the onboard 200MHz timebase to measure pulses. Use the property JY5211CITask.PulseMeas.Timebase to configure the timebase.

Please refer to chapter 4.4.3 for more information about timebase.

Terminals

To change the terminal of signals instead of using its default value shown in chapter 2.6, use following properties:

l JY5211CITask.PulseMeas.InputTerminal – Signal-to-measure input terminal.

l JY5211CITask.PulseMeas.Timebase.External.Terminal – External timebase input terminal.


Learn by Examples 4.2.2

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Pulse Measurement > Learn by Examples 4.2.2
Learn by Examples 4.2.2

n Connect the signal source’s positive terminal Ch1 to PCIe/PXIe-5211 counter0’s pulse measure source (CTR0_Gate, Pin#31), negative terminal to the ground (GND, Pin#32) as shown in Table 2-15 Pin Defination . (CTR0_Gate, GND) consists of a pulse measure counter input.

n Set the signal source Ch1’s output to squarewave signal (f=1Hz, Duty Cycle=50%, [image] =3.3v, [image] =0v).


Single Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Pulse Measurement > Learn by Examples 4.2.2 > Single Mode
Single Mode

n Open Counter Input-->Winform CI Single Pulse, set the following numbers as shown:

Figure 17 Pulse Measure In Single Mode

Ø The table in the sample program is a connection diagram for your convenience.

n Click Start to start measuring the pulses. The result is shown by High-Level Duration (s) and Low-Level Duration (s):

Figure 18 Pulse Measure Value In Single Mode

Ø The numbers show the duration of High/Low Level in one signal period and match the duty cycle set before.


Finite/Continuous Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Pulse Measurement > Learn by Examples 4.2.2 > Finite/Continuous Mode
Finite/Continuous Mode

n Change the frequency of the squarewave to 50 Hz.

n Open Counter Input-->Winform CI Finite/Continuous Pulse, set the following numbers as shown:

Figure 19 Pulse Measure In Finite Mode

Ø The table in the sample program is a connection diagram for your convenience.

n Click Start to begin the finite/continuous pulse measurement. The result is shown below:

Figure 20 Pulse Measure Values In Finite Mode

Ø The numbers show the duration of High/Low Level in one signal period and match the duty cycle set before.

Please refer to Learn by Examples 4.3.1 Finite/Continuous Mode about the difference between Explicit and Implicit.


Frequency Measurement

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Frequency Measurement

The counter measures the frequency of the signal. Default, the measured signal must be connected to Counter Gate terminal.

Set JY5211CITask.Type to CIType.Frequency to use this function.

Timing

1) Single Mode

Frequency Measurement without sample clock is actually using Pulse Width Measuement internally, refer to chapter 4.2.2 for more information.

Every time the user reads the data, driver will automatically calculate the frequency ( [image] ) according to the HighTick ( [image] ), LowTick ( [image] ) values and known frequency of the timebase ( [image] ) according to the fomular and return the signal frequency to the user.

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Single.

2) Finite/Continuous Mode with Explicit Sample Clock (Averaging)

Between every two rising edges of the sample clock, the counter counts the number of full periods ( [image] ) of the signal, and the number of rising edges of timebase ( [image] ) during those full periods. These two values are stored into the buffer on each rising edge of the sample clock, as shown in Figure 21.

Figure 21 Frequency Measurement with Explicit Sample Clock

Every time the user reads the data, driver will automatically calculate the frequency ( [image] ) according to the buffered values and known frequency of the timebase ( [image] ) by using following fomular and return the result to user.

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Internal or CISampleClockSource.External.

3) Finite/Continuous Mode with Implicit Sample Clock

Frequency Measurement with implicit sample clock is actually using Pulse Measuement internally. Refer to chapter 4.2.2 for more information.

Every time the user reads the data, driver will automatically calculate the frequency ( [image] ) according to the HighTick ( [image] ) and LowTick ( [image] ) values according to the fomular and return the result to the user.

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Implicit.

Timebase

By default, the counter uses the onboard 200MHz timebase to measure pulses. Use the property JY5211CITask.FrequencyMeas.Timebase to configure the timebase.

Please refer to chapter 4.4.3 for more information about timebase.

Terminals

To change the terminal of signals instead of using its default value shown in chapter 2.3 , using following properties:

l JY5211CITask.FrequencyMeas.InputTerminal – Signal-to-measure input terminal.

l JY5211CITask. FrequencyMeas.Timebase.External.Terminal – External timebase input terminal.


Learn by Examples 4.2.3

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Frequency Measurement > Learn by Examples 4.2.3
Learn by Examples 4.2.3

n Connect the signal source’s positive terminal Ch1 to PCIe/PXIe-5211 counter0’s frequency measure source (CTR0_Gate, Pin#31), negative terminal to the ground (GND, Pin#32) as shown in Table 2-15 Pin Defination . (CTR0_Gate, GND) consists of a frequency measure counter input.

n Set the signal source Ch1’s output to squarewave signal (f=50Hz, Duty Cycle=50%, [image] =3.3v, [image] =0v).


Single Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Frequency Measurement > Learn by Examples 4.2.3 > Single Mode
Single Mode

n Open Counter Input-->Winform CI Single Frequency and click Start. The result is shown below by Frequency (Hz):

Figure 22 Frequency Measure In Single Mode

Ø The table in the sample program is a connection diagram for your convenience.

Ø The result matches the frequency set before.


Finite/Continuous Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Frequency Measurement > Learn by Examples 4.2.3 > Finite/Continuous Mode
Finite/Continuous Mode

n Open Counter Input-->Winform CI Finite/Continuous Frequency.

Figure 23 Frequency Measure In Finite Mode

Ø The table in the sample program is a connection diagram for your convenience.

Ø Please refer to Learn by Examples 4.3.1 Finite/Continuous Mode about the difference between Explicit and Implicit.

n Click Start and it will show the frequency 50 as set in the signal source.

Figure 24 Frequency Measure Values In Single Mode


Period Measurement

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Period Measurement

The counter measures the period of the signal. Default, the signal must be connected to Counter Gate terminal.

Set JY5211CITask.Type to CIType.Period to use this function.

Period Measurements is using Frequency Measurement internally and returns the reciprocal of Frequency Measuremnt. Refer to chapter for more information.


Learn by Examples 4.2.4

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Period Measurement > Learn by Examples 4.2.4
Learn by Examples 4.2.4

n Connect the signal source’s positive terminal Ch1 to PCIe/PXIe-5211 counter0’s period measure source (CTR0_Gate, Pin#31), negative terminal to the ground (GND, Pin#32) as shown in Table 2-15 Pin Defination. (CTR0_Gate, GND) consists of a period measure counter input.

n Set the signal source Ch1’s output to squarewave signal (f=200Hz, Duty Cycle=50%, [image] =3.3v, [image] =0v).


Single Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Period Measurement > Learn by Examples 4.2.4 > Single Mode
Single Mode

n Open Counter Input-->Winform CI Single Period and click Start. The result is shown below by Period (s):

Figure 25 Period Measure In Single Mode

Ø The table in the sample program is a connection diagram for your convenience.

Ø The result of Period (s) shows the correspond to the frequency set before.


Finite/Continuous Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Period Measurement > Learn by Examples 4.2.4 > Finite/Continuous Mode
Finite/Continuous Mode

n Open Counter Input-->Winform CI Finite/Continuous Period and click Start. The result is shown below by Period(s).

Figure 26 Period Measure In Finite Mode

Ø The table in the sample program is a connection diagram for your convenience.

Ø The result of Period(us) shows the correspond to the frequency set before.


Two-Edge Separation

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Two-Edge Separation

The counter measures the speration (interval between each rising edges of two signals) between the rising edges of two signals. Default, the first signal must be connected to Counter Gate terminal and the second signal must be connect to Counter Aux terminal.

Set JY5211CITask.Type to CIType.TwoEdgeSeparation to use this function.

Timing

1) Single Mode

The number of rising edges of timebase between the rising edge of the first signal and the rising edge of the scecond signal is written to the register on each rising edge of the second signal.

The number of rising edges of timebase between previous rising edge of the second signal and current rising edge of the first signal is written to the resgiter on each rising edge of the first signal.

As shown in Figure 27.

Figure 27 Two-Edge Separation in Single Mode

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Single.

2) Finite/Continuous Mode with Explicit Sample Clock:

The counting values of rising edges of timebase between first signal and second signal are stored into buffer on each rising edge of the sample clock, as shown in Figure 28 .

Figure 28 Two-Edge Seperation with Explicit Sample Clock

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Internal or CISampleClockSource.External.

3) Finite/Continuous Mode with Implicit Sample Clock

In implicit mode, the signal active edge as the implicit sample clock edge. The counting values of rising edges of timebase between first signal and second signal are stored into buffer on each rising edge of the first signal, as shown in Figure 29.

Figure 29 Two-Edge Seperation with Implicit Sample Clock

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Implicit.

Timebase

By default, the counter uses the onboard 200MHz timebase to measure pulses. Use the property JY5211CITask.TwoEdgeSeparation.Timebase to configure the timebase.

Please refer to chapter 4.4.3 for more information about timebase.

Terminals

To change the terminal of signals instead of using its default value shown in chapter 2.3, using following properties:

l JY5211CITask.TwoEdgeSeparation.FirstInputTerminal – First signal-to-measure input terminal.

l JY5211CITask.TwoEdgeSeparation.SecondInputTerminal – First signal-to-measure input terminal.

l JY5211CITask.TwoEdgeSeparation.Timebase.External.Terminal – External timebase input terminal.


Learn by Examples 4.2.5

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Two-Edge Separation > Learn by Examples 4.2.5
Learn by Examples 4.2.5

n Connect the signal source’s two positive terminals Ch1, Ch2 to PCIe/PXle-5211 first signal input (Gate, Pin#31) and second signal input (AUX, Pin#63), two negative terminals to the ground (GND, Pin#64) and (GND, Pin#28).

n Set the signal source Ch1’s to squarewave signal (f=20Hz, Phase=0 [image] ), Ch2’s output to squarewave signal (f=20Hz, Phase=90 [image] ).


Single Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Two-Edge Separation > Learn by Examples 4.2.5 > Single Mode
Single Mode

n Open Counter Input-->Winform CI Single Two-Edge Separation and click Start. The result is shown below by First Separation and Second Separation, which represent the number of rising edges on the timebase difference between the rising edges of the two signals:

Figure 30 Two-Edge Separation Measure In Single Mode

Ø The table in the sample program is a connection diagram for your convenience.

Ø Due to the phase-difference between First Signal and Second Signal, First Separation(s) and Second Separation(s) are different.


Finite/Continuous Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Two-Edge Separation > Learn by Examples 4.2.5 > Finite/Continuous Mode
Finite/Continuous Mode

n Open Counter Input-->Winform CI Finite/Continuous Two-Edge Separation and click Start. The result is shown below by First Separation(s) and Second Separation(s), which represent the number of rising edges on the timebase difference between the rising edges of the two signals:

Figure 31 Two-Edge Separation Measure In Finite Mode

Figure 32 Two-Edge Separation Measure In Continuous Mode

Ø The table in the sample program is a connection diagram for your convenience.

Ø The result in this picture is similar to the result in Single Mode before.


Quadrature Encoder

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Quadrature Encoder
Quadrature Encoder

The quadrature encoder includes three encoding type: x1, x2, and x4.

Set JY5211CITask.Type to CIType. QuadEncoder to use this function, and use property JY5211CITask.QuadEncoder.EncodingType to change the type of encoding. Default, the A signal must be connected to Counter A terminal, the B signal mest be connected to Counter B terminal and the Z signal mest be connected to Counter Z terminal. For terminal Z, you can connect Z signal to it, or you can disable Z with property "ZReloadEnabled".

Encoding Type

1) x1 Encoding

When A signal leads B signal, the counter increases the count value on the rising edge of A signal; when B signal leads A signal, the counter decreases the count value on the falling edge of A signal as shown in Figure 33.

Figure 33 Quadrature Endcoder x1 Mode

2) x2 Encoding

When A signal leads B signal, the counter increases the count on the rising edge and the falling edge of A signal; when B signal leads A signal, the counter decreases the count value the rising edge and falling edge of A signal as shown in Figure 34.

Figure 34 Quadrature Encoder x2 Mode

3) x4 Encoding

When A signal leads B signal, the counter increases the count value on the rising and falling edges of A signal and B signal. When B signal leads A signal, the counter decreases the count value on the rising and falling edges of A signal and B signal. As shown in Figure 35.

Figure 35 Quadrature Encoder x4 mode

Channel Z Behavior

The reload phase is when Z signal is high and A signal and B signal are low.

Timing

Take Encoding x1 mode as an example.

1) Single Mode

The count value is written to the register on each rising edge of the A signal, as shown in Figure 33 .

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Single.

2) Finite/Continuous Mode with Explicit Sample Clock

The count value is stored into the buffer on each rising edge of the sample clock, as shown in Figure 36 .

Figure 36 Quadrature Encoder x4 with Explicit Sample Clock

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Internal or CISampleClockSource.External.

3) Finite/Continuous Mode with Implicit Sample Clock

In implicit mode, the signal active edge as the implicit sample clock edge. The count value is stored into the buffer on the transition of signal as shown in Figure 37 .

Figure 37 Quadrature Encoder x4 with Implicit Sample Clock

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Implicit.

Terminals

To change the terminal of signals instead of using its default value as shown in chapter 2.3 , use following properties:

l JY5211CITask.QuadEncoder.AInputTerminal – Signal A input terminal.

l JY5211CITask.QuadEncoder.ZInputTerminal – Signal Z input terminal.

l JY5211CITask.QuadEncoder.BInputTerminal – Signal B input terminal.


Learn by Examples 4.2.6

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Quadrature Encoder > Learn by Examples 4.2.6
Learn by Examples 4.2.6

n Connect the signal source’s two positive terminals Ch1, Ch2 to PCIe/PXle-5211 first signal input (A, Pin#65) and second signal input (B, Pin#63), two negative terminals to the ground (GND, Pin#32) and (GND, Pin#28).

n Set the signal source Ch1’s to squarewave signal (f=5Hz, Phase=0˚) and Ch2’s output to squarewave signal (f=5Hz, Phase=90˚).


Single Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Quadrature Encoder > Learn by Examples 4.2.6 > Single Mode
Single Mode

n Open Counter Input--> Winform CI Single Quadrature Encoder and click Start. The result is shown below by Count.

Figure 38 Quadrature Encoder In Single Mode

Ø The table in the sample program is a connection diagram for your convenience.

Ø Encoding Type is set by Encode Type (x1, x2, x4).

n When the Encoding type is changed from x1 to x2 and x4, you can see the rising speed of Count is twice and four times than x1Mode.


Finite/Continuous Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Quadrature Encoder > Learn by Examples 4.2.6 > Finite/Continuous Mode
Finite/Continuous Mode

n Open Counter Input--> Winform CI Single Quadrature Encoder and click Start. The result is shown below by Count.

Figure 39 Quadrature Encoder In Finite Mode

Figure 40 Quadrature Encoder In Continuous Mode

Ø The table in the sample program is a connection diagram for your convenience.

Ø Encoding Type is set by Encode Type (x1, x2, x4).

Ø When the encode type is changed from x1 to x2 and x4, you can see the rising speed of Count is twice and four times than x1Mode.


Two-Pulse Encoder

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Two-Pulse Encoder
Two-Pulse Encoder

The count value increases on the rising edge of A signal and decreases on the rising edge of B signal. Default, the A signal must be connected to Counter A terminal, the B signal mest be connected to Counter B terminal.

Set JY5211CITask.Type to CIType.TwoPulseEncoder to use this function

Timing

1) Single Mode

The count value is written to the register on each rising edge of the A signal, and B signel, as shown in Figure 41.

Figure 41 Two-Pulse Encoder in Single Mode

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Single.

2) Finite/Continuous Mode with Explicit Sample Clock

The count value is stored into the buffer on each rising edge of the sample clock, as shown in Figure 42.

Figure 42 Two-Pulse Encoder with Explicit Sample Clock

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Internal or CISampleClockSource.External.

3) Finite/Continuous Mode with Implicit Sample Clock

In implicit mode, the signal active edge as the implicit sample clock edge. The count value is stored into the buffer on the rising edge of A signal and B signal, as shown in Figure 43.

Figure 43 Two-Pulse Encoder with Implicit Sample Clock

To configure the counter to work in this mode, set JY5211CITask.Mode to CIMode.Finite or CIMode.Continuous, and set JY5211CITask.SampleClock.Source to CISampleClockSource.Implicit.

Terminals

To change the terminal of signals instead of using its default value as shown in chapter 2.3, use following properties:

l JY5211CITask.TwoPulseEncoder.AInputTerminal – Signal A input terminal.

l JY5211CITask. TwoPulseEncoder.BInputTerminal – Signal B input terminal.


Learn by Examples 4.2.7

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Two-Pulse Encoder > Learn by Examples 4.2.7
Learn by Examples 4.2.7

n Connect the signal source’s two positive terminals Ch1, Ch2 to PCIe/PXle-5211 first signal input (A, Pin#65) and second signal input (B, Pin#63), two negative terminals to the ground (GND, Pin#32) and (GND, Pin#28).

n Set the signal source Ch1’s to squarewave signal (f=10Hz, Phase=0˚) and Ch2’s output to squarewave signal (f=5Hz, Phase=90˚).


Single Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Two-Pulse Encoder > Learn by Examples 4.2.7 > Single Mode
Single Mode

n Open Counter Input-->Winform CI Single Two-Pulse Encoder and set the numbers as shown.

Figure 44 Two-Pulse Encoder In Single Mode

n The table in the sample program is a connection diagram for your convenience.

n Click Start to start counting. You can see a continuously rising of the Count.


Finite/Continuous Mode

Help > Operating PCIe/PXIe-5211 > Counter Measurement Operations > Two-Pulse Encoder > Learn by Examples 4.2.7 > Finite/Continuous Mode
Finite/Continuous Mode

n Open Counter Input-->Winform CI Continuous Two-Pulse Encoder and set the numbers as shown.

Figure 45 Two-Pulse Encoder In Continuous Mode

Ø The table in the sample program is a connection diagram for your convenience.

Ø Click Start and you can see a group of rising numbers in position, which follows the counting rules explained in4.2.7.


Counter Generation Operations

Help > Operating PCIe/PXIe-5211 > Counter Generation Operations
Counter Generation Operations

The PCIe/PXIe-5211 can generate multiple forms of output signals according to different timing modes, including:

l Pulse generation with dynamic update

l Buffered pulse sequence generation

Timing

1) Single Mode

5211 can output a single pulse with a specified pulse configuration. The timing diagram of the pulse output is shown in Figure 46 .

Figure 46 Pulse Output in Single Mode

Dynamic Update

If the number of pulses is set to -1, the pulses will be output continuously until requesting to stop. In this case, it is allowed to change the frequency and duty cycle on the fly. The timing diagram is shown as Figure 47 .

Figure 47 Pulse Output in Single Mode with Dynamic Update

2) Finite/Continuous Mode

This mode allows the user to write all configurations of pulses to be output to the buffer in advance. After send the currently configured pulses, the counter will automatically read the configuration of the next set of pulses to be sent from the buffer and start output. The timing diagram is shown in Figure 48 .

Figure 48 Buffered Pulse Sequence Generation

Each set of pulses can be configured in different ways:

l Frequency, Duty cycle and Number of pulses

l High time, Low time and Number of pulses

l High ticks, Low ticks and Number of pulses

Timebase

By default, the counter uses the onboard 200MHz timebase to generate pulses. Use the property JY5211COTask.Timebase to configure the timebase.

Please refer to chapter 4.4.3 for more information about timebase.

Terminals

To change the terminal of signals instead of using its default value as shown in chapter 2.3 , using following properties:

l JY5211COTask.OutputTerminal – Signal output terminal.


Single Mode

Help > Operating PCIe/PXIe-5211 > Counter Generation Operations > Learn by Examples > Single Mode
Single Mode

n Open Counter Output-->Winform CO Single and click Start and set the numbers as follow:

Figure 49 CO In Single Mode


Finite Mode

Help > Operating PCIe/PXIe-5211 > Counter Generation Operations > Learn by Examples > Finite Mode
Finite Mode

n Open Counter Output-->Winform CO Finite and click Start and set the numbers as follow:

Figure 50 CO In Finite Mode

Ø The table in the sample program is a connection diagram for your convenience.


Clocks

Help > Operating PCIe/PXIe-5211 > Clocks
Clocks

Figure 51 shows the structure of counter clock system.

Figure 51 Clocks Diagram


PLL

Help > Operating PCIe/PXIe-5211 > Clocks > PLL
PLL

PLL (Phase Locked Loop) is a phase-locked clock generator that can generate a clock signal of a specified frequency according to the selected reference clock source.

PCIe/PXIe-5211 Series boards support the following reference clock source:

1) Onboard 10MHz Clock

Using the on-board 10MHz (TXCO) as the PLL input source can help improve the PLL output clock performance, including improving clock accuracy, temperature stability, and phase noise.

2) PXIe_CLK100

The PXIe_CLK00 siganal is a 100MHz clock provided by the PXIe backplane for every peripheral slot. When using this clock, PXIe-5211 can provide multi-card synchronization.

3) External Reference Clock

An external reference clock is a clock provided by user through terminal PXIe-DSTARA. To use an external reference clock, the user needs to specify its frequency.

By defaut, onboard 10MHz Clock is selected as the reference clock source. To change the reference clock source, configure the device as follows:

Set property Task.Device.ReferenceClock.Source to target reference clock source. Task is user defined JY5211CITask or JY5211COTask.

If the target clock source is External:

l Set Task.Device.ReferenceClock.External.Terminal to dersired terminal.

l Set Task.Device.ReferenceClock.External.Frequency to the frequency of this clock source.

Call method Device.Commit() to activate the configuration.

Note:

1. Clock configuration are not allowed to change while any counter tasks are running.

Clock configuration is applied to all tasks (including DI, DO, CI, CO).

The PCIe/PXIe-5211 module must be powered off and restarted if the user submits the incorrect clock frequency by using external clock source (PXIe_DSTARA).


Sample Clock

Help > Operating PCIe/PXIe-5211 > Clocks > Sample Clock
Sample Clock

For all counter measurement applications with buffered measurement, PCIe/PXIe-5211 provides 3 sample clock options as follows:

l Internal

The internal sample clock is generated by dividing down the 200MHz base clock, and can be set independently for each counter.

To use the internal sample clock, configure as follows:

1. Set JY5211CITask.SampleClock.Source to CISampleClockSource.Internal

2. Set JY5211CITask.SampleClock.Internal.Rate to specify sample rate

l External

External sample clock refers to an external signal input from a terminal as the sample clock

To use the external sample clock, configure as follows:

1. Set JY5211CITask.SampleClock.Source to CISampleClockSource.External

2. Set JY5211CITask.SampleClock.External.ExpectedRate to the rate of the external sample rate.

This property’s value helps the driver determine a more suitable DDR writing frequency.

Can be set to an approximate value (sometimes the external sample clock may not have a fixed frequency). But cannot be less than the actual sampling rate, otherwise it will cause DDR write exception.

The default value of this property is -1, which means that the driver will be set with the safest value.

l Implicit

Using an implicit sampling clock means the counter will send data to the buffer whenever there is a new measurement or count value.

To use the implicit sample clock, configure as follows:

1. Set JY5211CITask.SampleClock.Source to CISampleClockSource.Implicit.

2. Set JY5211CITask.SampleClock.Implicit.ExpectedRate to desired sample rate. This property has the same effect as JY5211CITask.SampleClock.External.ExpectedRate.


Timebase

Help > Operating PCIe/PXIe-5211 > Clocks > Timebase
Timebase

JY5211 provides four options for timebase source as follows:

l Internal 200MHz: - Same signal as the 200MHz base clock generated by PLL.

l Internal 5MHz – Generated by dividing down the 200MHz timebase.

l Internal 100kHz – Generated by dividing down the 200MHz timebase.

l External - Use a signal on a terminal as the timebase


Start Trigger

Help > Operating PCIe/PXIe-5211 > Start Trigger
Start Trigger

For all counter measurement and generation applications, the task starts running when the start trigger happens.

Start trigger has the following types:

Immediately

The task will start immediately after JY5211xxTask.Start() is called.

Software

After calling JY5211xxTask.Start () on the software, the task will not start until a software trigger is received.

Digital

An external digital trigger is generated when the external trigger source terminal detects a rising edge as shown in Figure 52 .

Figure 52 Rising Edge Digital Trigger


Logic Level

Help > Operating PCIe/PXIe-5211 > Logic Level
Logic Level

PCIe/PXIe-5211 module supports multiple logic levels as follows: 1.8 V,2.5 V, 3.3 V and 5 V.

To change the logic level by the following properties:

1. Set property Device.LogicLevel to target logic level.

Call method Device.Commit() to activate the configuration.

Note:

Logic Level configuration will be applied to all PFIs


Multi-Card Synchronization

Help > Operating PCIe/PXIe-5211 > Multi-Card Synchronization
Multi-Card Synchronization

PCIe/PXIe-5211 Series modules support master-slave synchronization mechanism to achieve multi-card synchronous acquisition.

Master-Slave Synchronization

It will use 3 signals, Reference clock, Sync Pulse and Triger to achieve data acqusistion simultaneously with multiple modules. First, the master module will notice all of slave modules by routing the trigger signal through PXI trigger bus, PXI_TRIG<0..7> when master module receives trigger. Second, we also need to make sure every module to start the acquisition task in the same time, therefore we could take advange of PXI system which can provide a synchronization pulse, PXIe_SYNC100 to coordinate with the acquisition task of multiple modules.

Third, every module must use the same reference clock to keep pace with each others and user can use PXIe_CLK100 which provides by PXI system as reference clock.

The timing diagram is shown as Figure 53 .

Figure 53 Master-Slave Synchronization

To enable the multi-card synchronization, configure the board as follows:

1. Set each task on different card as Master or Slave. Only one master is allowed.

2. Set the reference clock source of master card and slave card to PXIe_CLK100. Refer to 4.4.1 for more information.

3. Route trigger signals of all tasks to the same signal terminal, trigger signal will be sent from the master card to all slave cards through this terminal.

4. Route Sync Pulse signals of all tasks to the same signal terminal, Sync Pulse signals will be sent from the master card to all slave cards through this terminal.

5. Start all slave tasks.

6. Start the master task (if digital trigger or software trigger is enabled, you need to wait for the trigger signal to arrive), all the tasks will start to work synchronously on a rising edge of the PXIe_SYNC100 signal.


System Synchronization Interface (SSI)for PCIe Modules

Help > Operating PCIe/PXIe-5211 > System Synchronization Interface (SSI)for PCIe Modules
System Synchronization Interface (SSI)for PCIe Modules

The synchronization between PCIe modules are handled differently from the PXIe synchronization, it is implemented by the system synchronization interface (SSI). SSI is designed as a bidirectional bus and it can synchronize up to four PCIe modules. One PCIe module is designated as the master module and the other PCIe modules are designated as the slave modules.

Figure 54 SSI Connector in PCIe-5211

Table 7 SSI Connector Pin Assignment for PCIe-5211


DIP Switch in PCIe-5211

Help > Operating PCIe/PXIe-5211 > DIP Switch in PCIe-5211
DIP Switch in PCIe-5211

PCIe-5211 series modules have a DIP switch. The card number can be adjusted manually by turning the DIP switch, which is used to identify the module with different slot positions.

For example, if you want to set the card number to 3, you could turn the position 2 and 1 of the DIP switch to the ON position and the orthers to OFF. Find the detail below.

Figure 55 DIP Switch in PCIe-5211

Table 8 Relationship between switch position and slot number


Using PCIe/PXIe-5211 in Other Software

Help > Using PCIe/PXIe-5211 in Other Software
Using PCIe/PXIe-5211 in Other Software

While JYTEK’s defalt application platform is Visual Studio, the programming language is C#, we recognize there are other platforms that are either becoming very popular or have been widely used in the data acquisition applications. Among them are C++ etc. This chapter explains how you can use PCIe/PXIe-5211 DAQ card using one of this software.


C++

Help > Using PCIe/PXIe-5211 in Other Software > C++
C++

JYTEK internaly uses our C++drivers to design the C# drivers. We recommend our customers to use C# drivers because C# platform deliver much better efficiency and performance in most situations. We also make our C++ drivers available. However, due to the limit of our resources, we do not actively support C++ drivers. If you want to be our partner to support C++ drivers, please contact us.


JYTEK China

Help > About JYTEK > JYTEK China
JYTEK China

Founded in June, 2016, JYTEK China is a leading Chinese test & measurement company, providing complete software and hardware products for the test and measurement industry. The company is a joint venture between Adlink Technologies and a group of experienced professionals form the industry. JYTEK independenly develop the software and hardware products and is entirely focused on the Chinese market. Our Shanghai headquarters and production service center have regular stocks to ensure timely supply; we have R&D centers in Xi'an and Chongqing to develop new products; we also have highly trained direct technical sales representatives in Shanghai, Beijing, Tianjin, Xi'an, Chengdu, Nanjing, Wuhan, Haerbin, and Changchun. We also have many patners who provide system level support in various cities.


JYTEK Korea and JYTEK In Other Countries

Help > About JYTEK > JYTEK Korea and JYTEK In Other Countries
JYTEK Korea and JYTEK In Other Countries

JYTEK Korea was the first JYTEK enterprise outside China to promote JYTEK products. Together with Adlink Technologies and JYTEK China, JYTEK is expanding to more countries. Each JYTEK location is an independently owned and operated franchise. It shares JYTEK’s philosophy and business approach. Together JYTEK entities promote the JYTEK brand, technology, and products.


JYTEK Hardware Products

Help > About JYTEK > JYTEK Hardware Products
JYTEK Hardware Products

According to JYTEK’s agreement with our equity partner Adlink Technologies, JYTEK’s hardware is manufactured by the state-of-art manufacturing facility located in Shanghai Zhangjiang Hi-Tech Park. Adlink has over 20 years of the world-class low-volumn and high-mix manufacturing expertise with ISO9001-2008, China 3C, UL, ROHS, TL9000, ISO-14001, ISO-13485 certifications. Its 30,000 square meters facilities and three high-speed Panasonic SMT production lines can produce 60,000 pieces boards/month; it also has full supply chain management - planning, sweeping, purchasing, warehousing and distribution. Adlink’s manufacturing excellence ensures JYTEK’s hardware has word-class manufacturing quality.

One core technical advantage is JYTEK’s pursue for the basic and fundamental technology excellence. JYTEK China has developed a unique PCIe, PXIe, USB hardware driver architecture, FirmDrive, upon which many our future hardware will be based.

In addition to our own developed hardware, JYTEK also rebrands Adlink’s PXI product lines. In addition, JYTEK has other rebranding agreements to increase our hardware coverage. It is our goal to provide the complete product coverage in PXI and PCI modular instrumentation and data acquisition.


JYTEK Software Platform

Help > About JYTEK > JYTEK Software Platform
JYTEK Software Platform

JYTEK has developed a complete software platform, SeeSharp Platform, for the test and measurement applications. We leverage the open sources communities to provide the software tools. Our platform software is also open sourced and is free, thus lowering the cost of tests for our customers. We are the only domestic vendor to offer complete commercial software and hardware tools.


JYTEK Warranty and Support Services

Help > About JYTEK > JYTEK Warranty and Support Services
JYTEK Warranty and Support Services

With our complete software and hardware products, JYTEK is able to provide technical and sales services to wide range of applications and customers. In most cases, our products are backed by a 1-year warranty. For technical consultation, pre-sale and after-sales support, please contact JYTEK of your country.


Statement

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Statement

The hardware and software products described in this manual are provided by JYTEK China, or JYTEK in short.

This manual provides the product review, quick start, some driver interface explaination for JYTEK PCIe/PXIe-5211 Series family of multi-function data acquisition boards. The manual is copyrighted by JYTEK.

No warranty is given as to any implied warranties, express or implied, including any purpose or non-infringement of intellectual property rights, unless such disclaimer is legally invalid. JYTEK is not responsible for any incidental or consequential damages related to performance or use of this manual. The information contained in this manual is subject to change without notice.

While we try to keep this manual up to date, there are factors beyond our control that may affect the accuracy of the manual. Please check the latest manual and product information from our website.

Shanghai Jianyi Technology Co., Ltd.

Address: Room 201, Building 3, NO.300 Fangchun Road, Shanghai.

Post Code: 201203

Tel: 021-5047 5899

Website: www.jytek.com